ECE1388H: VLSI Design Methodology

The course introduces a design methodology for very-large-scale-integration (VLSI) circuits using advanced computer-aided-design (CAD) tools. The focus is on learning Cadence integrated circuit (IC) design tools to implement the IC design flow. The methodology includes the steps of: custom digital circuit design, automated digital circuit synthesis, digital and mixed-signal circuit simulation, custom layout design, and automated layout generation. The course includes several projects using a 65nm CMOS process: 1) transistor characterization, 2) full custom digital circuit and layout design, 3) automated digital circuit synthesis and layout place-and-route, and 4) team-based design of a full IC employing the methodology learned in the course.

Credit Value (FCE)

0.50

Campus(es)

St. George

Delivery Mode

In Class

School of Graduate Studies University of Toronto 63 St. George Street Toronto, ON Canada M5S 2Z9
Tel: 416-978-6614

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