This course presents an overview of the fundamental data path and memory concepts that are needed to realize high-performance digital hardware implementations of AI algorithms and systems commonly described using vector and matrix algebra. The performance metrics of interest include die area, inference throughput, latency, power (or energy) in addition to standard metrics such as Accuracy, Precision, F1 Score, etc. The concepts of particular focus are high-performance SoC realizations of hardware accelerators for transformer-based systems that are now being deployed using standard CMOS technology.